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Design Verification Engineer (SoC/ASIC/RTL)

salary Salary :

$7,000 - 15,000 monthly

icon briefcase Job Type : Full Time

Number of Applicants

 : 

000+

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Job Description - Design Verification Engineer (SoC/ASIC/RTL)

Responsibilities:

  • Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.
  • Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.
  • Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels.
  • Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out.
  • Collaborate with design engineers to troubleshoot and resolve simulation issues.
  • Provide support to test engineers during post-silicon validation.
  • Mentor and guide team members and junior engineers, aiming to enhance verification efficiency.​

Requirements:

  • Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent with 3 years working experience.
  • Extensive understanding of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware-software co-verification methodology.
  • Skilled in Verilog, SystemVerilog, Python, Perl, TCL, Shell scripting, C/C++, SystemC, and assembly coding for industry-standard ISAs.
  • Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocols, RISC-V/ARM, or DSP cores.
  • Experience in verifying designs at RTL and post-P&R gate levels.

__________________________________________________________

HOW TO APPLY :

Interested candidates, please submit your resume by clicking on “Quick Apply” or contact [email protected] for more details.

Please provide following information in the resume for immediate processing

1) Reasons for leaving current and/or last employment

2) Last drawn and/or current salary

3) Expected salary

4) Date of availability and/or Notice Period

All applications will be treated in strictest confidence and only shortlisted candidates will be notified

Wee Wai Dan

EA License No : 03C5391

EA Reg No : R22109628

Original job Design Verification Engineer (SoC/ASIC/RTL) posted on GrabJobs ©. To flag any issues with this job please use the Report Job button on GrabJobs.
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About the Company

HKM HR MANAGEMENT PTE. LTD.

HKM HR Management, founded in 1996, is a leading recruiter and executive search company in Singapore. We provide a full range of human capital solutions to SMEs and MNCs across all industries as well as offer exciting job opportunities to job seekers. Our team of dedicated recruitment professional...

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