Analog Layout Engineer

Requirements

• Have fundamental understanding of electrical concepts, likely acquired through a degree in Electrical Engineering (graduate or undergraduate).
• Know how to use CAD tools to do the implementation layers, microelectronic layers in design that go beyond the schematics.
• Track record of delivering high-speed or precision analog circuits, preferably in multiple process nodes
• Have ownership through the full development cycle: floorplan, layout, verification, delivery, and support
• Assume more responsibility and ownership of tasks, from cells to functional blocks, to higher-level macros, to full interfaces or chips
• Have excellent communication skills to give status updates to your team, present to global teams in different time zones, and to share information with many different levels of personnel at Marvell

Job Responsibilities

• Working with global teams across Argentina, Singapore, the U.S., and Europe, you will run simulations and verifications using Cadence Virtuoso, collaborating closely with the designer to refine and debug iteratively until the design meets specifications.
• Project durations vary from a few months to a year and a half with flexibility to switch based on changing priorities is appreciated.
• Regular meetings with your paired designer ensure collaborative information sharing, integral to Marvell's commitment to partnership and teamwork.
• As a key contributor, you play a crucial role in the project lifecycle, participating in routine meetings as a technical mentor, layout team, and the broader project team. These interactions include updates on progress and may involve presenting specific issues or solutions encountered during the development of cutting-edge technologies. The dynamic nature of our work ensures continuous learning and knowledge-sharing among colleagues.