Job Description
Responsibilities
Validation Execution
Support Verilog simulation tasks (testbench execution, waveform review) to reproduce sightings and validate fixes.
Data & Automation
Debug & Collaboration
Collaborate with cross-functional teams (Design, DV, QA, GQ) and attend technical meetings.
Minimum Qualifications
Bachelor’s in Electrical or Computer Engineering (or related) with Experience or MS in EE/CE
2+ years experience in semiconductor validation or product engineering (DRAM/HBM preferred).
Exposure to HBM Validation concepts and flows.
Basic experience in test platform code development (C/C++, Python) and familiarity with APG (Algorithmic Pattern Generator).
Understanding of MBIST and Native Mode testing platforms.
Verilog simulation exposure (running testbenches, interpreting waveforms).
Strong analytical and problem-solving skills; ability to work in a fast-paced environment.
Preferred Skills
Familiarity with Linux environment and version control systems (Git/SVN).
Comfortable with lab equipment (oscilloscopes, logic analyzers).
Knowledge of DRAM/HBM architecture and datasheet interpretation.
Interest in automation and continuous improvement initiatives.
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