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Logic Design & Verification Engineer (RTL / UVM / ASIC Development)

salary Salary :

$7,000 - 12,000 monthly

icon briefcase Job Type : Full Time

Number of Applicants

 : 

000+

Click to reveal the number of candidates who applied for this job.

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Job Description - Logic Design & Verification Engineer (RTL / UVM / ASIC Development)

My Client:

My client is a fast-growing global technology company building high-performance chip systems for large-scale computing applications. The engineering team focuses on digital front-end design and verification, delivering robust and scalable ASIC solutions.The team works in a highly collaborative and engineering-driven environment, combining RTL design, verification methodologies, and system-level optimization. They are currently expanding their front-end engineering team to support next-generation chip development.

Job Responsibilities:

  • Design and implement RTL modules using Verilog/SystemVerilog for ASIC/SoC projects.
  • Develop and execute verification plans, including testbench development using UVM methodology.
  • Perform functional verification, debugging, and coverage analysis to ensure design correctness.
  • Participate in SoC integration, testability (DFT) design, and overall front-end development flow.
  • Collaborate with architecture, physical design, and software teams to ensure seamless integration.
  • Contribute to automation and tooling improvements using scripting languages.

Job Requirements:

  • Bachelor’s degree or above in Electrical Engineering, Computer Engineering, or related fields.
  • Understanding of digital design fundamentals and IC development flow.
  • Familiarity with Verilog/SystemVerilog and basic RTL design concepts.
  • Exposure to verification methodologies (e.g., UVM) is a plus.
  • Basic scripting skills (Python / Shell) preferred.
  • Strong analytical thinking, problem-solving ability, and learning agility.

What They Offer:

  • Opportunity to work on advanced ASIC/SoC projects with real-world impact.
  • Exposure to both design and verification in a full front-end flow.
  • Clear career progression in chip design and verification domains.

About Us

Dada Consultants was established in 2017, with the commitment of providing the best recruitment services in Singapore. We are comprised of a dynamic head-hunting team dedicated to sourcing for highly competent professionals in IT industry. We provide enterprises with customized talent solutions, and bring talents to career advancement.

If it sounds like your next move, please don’t hesitate to apply. Kindly note that only shortlisted candidates will be contacted. Appreciate your understanding. Data provided is for recruitment purposes only.

www.dadaconsultants.com

EA Registration Number: R2197058

Business Registration Number: 201735941W. Licence Number: 18S9037

Original job Logic Design & Verification Engineer (RTL / UVM / ASIC Development) posted on GrabJobs ©. To flag any issues with this job please use the Report Job button on GrabJobs.
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