Number of Applicants
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Responsibilities (Actual daily deliverables):
· Oversee the Process Engineering Section for Taping, BG, Wafer-mount, de-taping, LG, SAW and Automatic Optical Inspection (AOI) & TNR operations.
· Provide technical leadership for engineers to control, sustain and to continuously drive improvement for yield, quality and cycle time.
· Establishing partnership and work with upstream processes such as Bumping to improve quality and yield performance.
· Establish and improve controls to ensure all products meet customers’ requirements in terms of quality and yield.
· Support on engagement with customers on improvement of process, material and equipment capabilities.
· Lead cross-functional teams such as production and equipment for out-of-control situations and provide decision on lot disposition.
· Continuously improve the yield of qualified products through systematic data analysis.
· Productivity improvement through process redesign to maximize productivity of both equipment and processes.
Required Experience and Qualifications (Required knowledge, skills andexperience---however acquired):
· Minimum 10 years in managerial/leadrole in fast moving semiconductor industry.
· Engineering degree from recognizedUniversity.
· Strong in process engineering inareas of Taping,BG, Wafer-mount, detaping, LG, SAW and Automatic Optical Inspection (AOI) &TNR operation for bare dies.
· Able to provide technical leadershipto a team of engineers for customer issues, yield improvement programs andprocess development activities.
· Ability to interface directly withcustomers in addressing quality issues, new product introduction and continuousimprovement programs.
· Strong knowledge in JMP, 8D, FMEA, DOE and Systematic Problem-solving.
STATS CHIPPAC PTE. LTD.
STATS ChipPAC is a leading provider of advanced semiconductor packaging and test services to global customers in the communication, consumer and computing markets. With a broad technology portfolio ranging from leadframe and laminate packages to advanced fan-out and fan-in wafer level technology, fl...
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