Senior Engineer, STPG PE (FDV‑Verilog)

We are looking for an Senior Engineer in Product Engineering, NAND Validation/Characterization, specializing in functional and design validation. Experienced in simulation‑based validation, failure analysis, and cross‑functional issue closure. Strong focus on automation, data‑driven validation, and applied AI/ML techniques to improve test efficiency, coverage, and debug productivity.

This role focuses on building scalable, reusable, and automated test program frameworks, including AI/ML‑driven initiatives, to support both deterministic validation flows and pseudo‑random validation (RSG – Random Sequence Generator). You will play a key role in architecting the backbone of Verilog test programs—enabling efficient development, execution, debug, and reuse across multiple products and technology nodes. Validation scope includes NAND datasheet commands, features, interfaces, and customer‑mode operations on silicon platforms. When device issues are uncovered, you will perform deep failure analysis, drive root‑cause identification, and collaborate closely with Design, Application Engineering, Product, System, and Validation teams to ensure timely issue closure and infrastructure readiness for product release.

If you are looking for a technically challenging, high‑impact, and collaborative role, STPG Product Engineering (FDV‑Verilog) offers the opportunity to work on leading‑edge NAND technologies with strong ownership and visibility.

Key Responsibilities:

• Designed and executed functional and design validation flows for advanced RG NAND devices using simulation platforms

• Developed  deterministic usage‑case tests and random sequence generators to validate NAND commands and customer‑mode features

• Performed detailed failure analysis of issues seen, root‑cause investigations (including digital and analog circuitry), and drove issue resolution with cross-functional teams

• Implemented  automation frameworks using C‑based programming, Python, and Perl to improve test development and execution efficiency

• Applied  AI/ML‑assisted techniques (data analytics, pattern recognition, anomaly detection) to:

• Accelerate failure triage and root‑cause analysis

• Identify validation coverage gaps

• Improve random sequence effectiveness and debug prioritization

• Utilized data‑driven methods and dashboards to track validation progress, defect trends, and release readiness

• For senior engineer, need to have at least 3–5 years of relevant professional working experience in a similar or related engineering role.

Skills Required:

• Bachelor’s degree in Electronics Engineering, Computer Engineering, or a related discipline

• Strong interest in design validation, characterization, and product engineering

• Proficiency in software development and scripting (e.g., C/C++, Perl, Python)

• Ability to apply AI/ML for test analytics and defect pattern analysis

• Excellent problem solving and analytical skills, with careful attention to root cause analysis

• Effective communication skills in written and spoken English, including documentation and presentation

• Ability to multitask and manage priorities in a fast‑paced development environment

• Proactive mindset toward continuous improvement and self‑development
  

  Performs hardware, software, semiconductor design or telecomm engineering assignments. This job mapping should be used only if the position cannot be mapped specifically to other design/development engineering jobs.