Staff Engineer/ Technical Manager, Physical Verification CAD

MediaTek Physical Verification team is looking for qualified candidate to be part of a team that define and enable physical sign-off flow and solutions for SOC design. The candidate will be enabling technology in advanced technology nodes.

Job Responsibilities:

• Co-work with PDK team to code and maintain DRC/LVS/ANT/ERC/LPE/ESD rule deck for various processes
• Develop layout implementation flow and physical verification flow
• Co-work with QA team to reduce the PDKs/Rule deck defects
• Perform full-chip physical verification such as debugging DRC/LVS/ERC
• Implement automation scripts in C-shell, Python and Perl

Requirements:

• Bachelor/Master’s Degree in Electrical / Electronics Engineering / Computer Science
• With a min. 8 years of relevant experience in IC Design Industry
• Familiar with IC Design front-to-backend flow
• Familiar with interposer design, TSV technology and chip stacking techniques such as CoWoS or EMIB with 2.5D and 3D ICs experiences. (Must have)
• Preferably well-versed in Calibre, ICV
• Proficient in script programming, such as, Tcl, Perl or C-shell
• Proficient in UNIX (Linux) platforms
• Strong communication skills, problem solving and analytical skills

Location: One North, Singapore