Enable Next-Gen Solutions Through Direct Engagement: Act as the technical owner for PVD solutions at assigned OSATs and Fabless accounts, ensuring alignment between design requirements and manufacturing processes. Understand Customers and Fabless stakes holders technical roadmap. Partner with Fabless packaging architects to define material stacks, reliability criteria, and integration flows; translate these into executable solutions for OSATs. Lead joint qualification programs involving Fabless and OSAT stakeholders: define success metrics, DoEs, and acceptance gates; manage execution to schedule. Resolve integration challenges across packaging flows (e.g., ESD, adhesion, contamination, stress) through structured problem-solving. Provide feedback to internal engineering for hardware and process enhancements based on OSAT and Fabless requirements. Establish process-of-record (POR) for advanced packaging applications (e.g., RDL barrier/seed, TSV liners, hybrid bonding underlayers). Drive tool acceptance (FAT/SAT) and HVM ramp at OSAT sites: SPC setup, chamber matching, defectivity control, and yield stabilization. Validate PVD film integrity under Fabless-driven reliability tests (JEDEC/IPC standards: EM, TDDB, thermal cycling). Bachelor's or Master's in Materials Science, Physics, Chemical Engineering, or related field; PhD preferred. 10+ years in semiconductor equipment/process engineering with strong PVD experience in Advanced Packaging (FO-WLP, 2.5D/3D, RDL/UBM). Proven success enabling solutions through direct engagement with OSATs and Fabless design houses. Experience enabling hybrid bonding or chiplet integration through PVD underlayers. Familiarity with APAC OSAT ecosystem and Fabless packaging roadmaps. Proficiency in SPC, DOE, metrology, and yield analytics. Expertise in thin-film metallurgy (Cu, Ni, Ti, Ta/TaN, Co) and reliability-critical stack design. Strong communication skills to engage executive Fabless stakeholders and OSAT engineering teams.
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