Advanced Packaging Integration Engineer

Department Intro:

The Technology Development (TD) department at Micron Technology is at the forefront of innovation, driving the advancement of memory and storage solutions that transform how the world uses information. Our team is dedicated to developing cutting-edge processes and technologies that enable the creation of next-generation semiconductor products. By collaborating closely with our global R&D and manufacturing teams, we ensure the seamless transfer and implementation of new technology nodes, maintaining Micron's leadership in the industry. Join us to be part of a dynamic and forward-thinking team that is shaping the future of technology.

Position Overview:

Join Micron's Advanced Packaging Technology Development (APTD) team and be part of an innovative organization that drives strategic packaging initiatives critical to our future! As a Principal Advanced Packaging Integration Engineer, you will work on brand-new solutions and collaborate with industry experts to propel our high-performance products to new heights.

Responsibilities:

• Develop and transfer technology in collaboration with process and design teams
• Design and tape out reticles, develop process flows, and secure resources, including wafers and processes
• Collect and analyze data to provide actionable outcomes for layout, design, or integration flow changes
• Achieve and improve yields impacted by design limitations, working with Probe, Yield Analysis, Test, and Reliability Engineering teams
• Ensure critical work, achievements, and goals are met while guiding resource utilization

Minimum Qualifications:

• MS in Electrical, Mechanical, Computer Engineering, Chemistry, Physics, Materials, or related field
• 10 years of experience in Process Integration/Development or Package Integration within the semiconductor industry
• Strong architectural sense to translate process/design into technical requirements and specifications
• 10 years expertise in data extraction, analysis, and reporting tools such as JMP, Python, R
• In-depth understanding of process flows, interactions, and their effects on yield, performance, and reliability
• Technical knowledge and experience in Ultra-Thin Die Integration, Thermal Compression Bonding, Die to wafer, and Gap fill technology in a semiconductor environment
• Experience in various assembly processes like Dicing, Thinning, Molding with expertise in Package Characterization and Process Metrology Memory Technology Integration of NAND and or DRAM including 3D Architectures

Preferred Qualifications:

• Ph.D. or equivalent experience in Electrical, Mechanical, Computer Engineering, Chemistry, Physics, Materials, or related field
• Experience with DRAM, HBM, NAND, 3D interconnects, or packaging technologies
• Proven leadership in a mentorship capacity