NAND Design Rule Manager

Req. ID:\n\nJR90515 NAND Design Rule Manager\n\nOur vision is to transform how the world uses information to enrich life for all.\n\nMicron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.\n\nJoin Micron, where your knowledge will influence the future of memory technology! As the Manager for NAND Design Rule/Process Integration, you will lead a talented team to support both development and large-scale production of advanced 3D NAND technologies. This position is essential for producing accurate design-rule and PDK results, ensuring high quality, and maintaining strict documentation across R\u0026D and production efforts.\n\n## Responsibilities:\n\n * Lead the release of design rules and PDK deliverables; coordinate DRC waivers, mask definitions, and mask reviews for both R\u0026D and production developments.\n * Own program execution and achievements from kickoff through end-of-life.\n * Partner with collaborators across Array \u0026 CMOS Process Integration, Devices, Layout \u0026 Build, Modeling, Scribe \u0026 Frame, unit process areas (e.g., PHOTO/OPC/CMP), and Quality \u0026 Reliability to guide new 3D NAND generations.\n * Ensure high quality and documentation for Build Rule Checks (DRCs) and drive timely disposition of deviations and exceptions.\n * Collaborate with Yield Improvement, Product Engineering, Defect Analysis, and Quality Assurance to identify layout- or database-related process issues and prioritize corrective actions.\n * Build and evaluate test structures to generate data for next-generation devices and to assess process margin on current technologies.\n * Synthesize complex technical problems and communicate status, risks, and resolutions clearly across functions and management levels.\n * Define and track sub-milestones within PDK/DBR/TO schedules; ensure targets are met through cross-team coordination.\n * Maintain strong, proactive communication with key collaborators and bring up issues early with data-driven options.\n * Drive continuous improvement in design-rule pathfinding and document takeaways that improve production parts still under development.\n\n\n\n## Requirements:\n\n * PhD in Electrical Engineering, Microelectronics, Physics, or Semiconductor Materials Science with 5+ years of relevant experience; or Master\u2019s degree with 8+ years; or bachelor\u2019s degree with 13+ years in the semiconductor industry (Process Integration, Yield Improvement, Product Engineering, Test Structure Development, or Unit Process Development).\n * Direct experience working with PDK, design rules, and layout, including small layout assignments, is necessary. You must be skilled in CAD software such as Cadence Virtuoso, K2View, and Mentor Graphics DRC/RVE or their equivalents.\n * A solid understanding of semiconductor device physics and VLSI silicon processing and integration flow is essential.\n * Demonstrated ability to resolve complex issues and communicate clearly under pressure.\n * Understanding of 3D NAND process flow and major NAND components (e.g., bit-line sensing, word-line driver, data path, and analog circuits).\n * Familiarity with CAD group interactions, data post-processing, and data transfer from built databases to reticles.\n * Preferred: prior leadership experience in R\u0026D for NAND or other memory technologies.\n\n\n\nMicron Technology is transforming how information is used globally by advancing memory and storage solutions. The company emphasizes innovation, collaboration, integrity, and professionalism, and is committed to supporting its global community while conducting business responsibly. Join us and be part of a world-class team that competes at the highest levels and successfully implements groundbreaking solutions!\n\nJob Profile(s):\n\nSemiconductor Process Engineer 5 - Semiconductor Process Eng MTS\n\nRelocation level: (TBD)\n\nBefore Getting Started \nPlease review Micron\u2019s Internal Job Application Policy on your regional PeopleNow Career Opportunities page before searching and applying for jobs. Note in particular that: \n\n * Hiring managers may view your performance appraisals, original resume, transcripts or other performance-related documentation in your personal file. This information will be held in confidence.\n * If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process.\n\n\n\n\u200b\u200b\u200b\u200b\n\nAs a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc\n\nMicron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.\n