SMTS, Global Quality IC Package Design/Development Quality Assurance

Execute technical risk assessment and NUDD (New, Unique, Different, Difficult) analysis when new designs and/or design rules are introduced and lead execution of risk mitigation. Develop holistic qualification plans and coordinate execution. Provide recommendations on release of new package technologies based on test results and technical risk assessment. Provide SME input to problem solving for package technology related issues to ensure effective root cause analysis and corrective/preventive actions. Work with customer-facing teams to draft and present content to address customer issues and requests. PhD degree in Engineering & Science -Electrical & electronics, mechanical, material science and engineering, physics, or related field of study 10+ years' experience in semiconductor package design, manufacturing or Q&R Experience with advanced packaging technologies (e.g., 3DI, Wafer-2-Wafer, SiP) Expert-level applied knowledge of package-level and board-level reliability test methods, reliability acceleration modeling, and sampling statistics. Expert-level understanding of Chip-Package Interaction and the effects thermomechanical and hygroscopic swelling stresses on reliability. Thorough knowledge of semiconductor package designs and challenges. Knowledge of package/assembly processes, board level reliability, and challenges. Understanding of mechanical and material interaction effects on reliability of IC components and/or printed circuit board (PCB) assemblies. Understanding of statistics and quality management (SPC, FMEA, 8D CAR, etc.) Must be self-motivated, able to work independently, and detail oriented. Strong analytical problem-solving skills, excellent multi-tasking skills and the ability to interact easily with other groups.