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SR. Engineer - NAND Generators

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Job Description - SR. Engineer - NAND Generators

Our vision is to transform how the world uses information to enrich life for all.

Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.

 As a Senior Mask Generator Engineer within this organization you will be chartered with defining, generating and maintaining mask data for current and future NAND technologies.   

You will be responsible for developing generator code to generate final mask data from drawn base layer data.  You will use this code to build all masks for development of a new technology from initial development to production ramp.  All mask data should be generated in a timely manner and error free.  We also work closely with NAND PI, design rule, OPC process and tapeout team to improve the quality and efficiency of the business process by developing automation tools.   

 

Your responsibilities may include, but are not limited to: 

  • Understand design rules, OPC, database, layout, etc. and be able to inspect layout, fractured data for errors.  

  • Develop and write generators using SVRF and review DRCs, etc.   

  • Develop experimental reticles for photo, PI, etc. 

  • Develop Tools and Flows Used in Physical Design, Functional and Physical Verification, Performance and Yield Optimization, and Tapeout  

We are seeking candidates with the following:  

  • BS 10+ years’ experience or MS 5+ years’ experience in Computer Science or Computer Engineering Or Electrical Engineering or Electronics Engineering 

  • Fundamental understanding of device structure, silicon processing, basic processing issues, and design rules that control them.  

  • Hands-on experience required in writing DRC runset using the Calibre SVRF

  • Experienced with metal fill algorithm and dealing with density issues is plus  

  • Experienced with the Tapeout process and the LPP# (Layer Purpose Pair) usage  

  • Solid knowledge of computer programming and software: UNIX/Linux system, Python, Perl, Shell script 

  • Intimate knowledge of appropriate CAD tools: Cadence df2/SKILL/K2view and Calibredrv is preferred   

  • The ability to interface with a wide variety of people with different skill sets: design, process, process integration, OPC, layout CAD.    

  • Good communication and problem-solving skills are required  

  • Fluent in English and able to communicate effectively with a global team  

About Micron Technology, Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.

To learn more, please visit micron.com/careers

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_sg@micron.com

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

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